Most computer systems consist of a processor unit and a number of peripheral devices coupled to the processor unit. The peripheral devices send and receive information to and from the processor and, typically, each peripheral device is separately connected to the processor unit by an individual set of cables, with each set of cables having a number of wires. The wires may be used for transferring information from the processor unit to the peripheral, as in the case of digital pixel data transferred to an active matrix flat panel display; or, the wires may used for transferring digital information from the peripherals to the processor unit, as in the case of digital data transferred from a keyboard or mouse to the processor unit.
FIG. 1 illustrates a conventional computer system 100 having a processor unit 101 and a number of peripherals coupled to the processor. The peripherals include a keyboard 102, a mouse 103, a display 104, a digital camera 105, and a pair of speakers 106a and 106b. As shown in FIG. 1, each of the peripherals is coupled to the processor unit through an individual cable assembly. Accordingly, the display 104 is coupled to the processor 101 through cable assembly 110, the keyboard 102 is coupled to the processor 101 through cable assembly 111, the mouse 103 is coupled to the processor 101 through cable assembly 112, the digital camera 105 is coupled to the processor 101 through cable assembly 114, and the pair of speakers 106a and 106b are coupled to the processor 101 through cable assemblies 115a and 115b. As can be seen from FIG. 1, this conventional computer system 100 requires a large number of wires to be coupled directly to the processor 101. This configuration is undesirable for a myriad of reasons which should be obvious to one of ordinary skill in the art.
In order to reduce the number of wires that the user must connect to a processor unit, information may be sent to and from a hub system where it is then routed to the proper peripheral. The hub system may be designed as a stand alone device or it may, preferably, be implemented within one of the peripherals, with each of the other peripherals being coupled thereto. FIG. 2 illustrates a computer system 200 having a hub system 201 coupled to a processor unit 202. In the prior art embodiment illustrated in FIG. 2, the hub system 201 is implemented within a display 203 and is fully integrated within the display 203. Additional peripherals, such as a keyboard 204, a mouse 205, a digital camera 206 and a pair of speakers 207a and 207b are each coupled to the hub system 201. The hub system 201 acts as a pass through port or routing system. As shown in FIG. 2, the processor unit 202 and the hub system 201 are coupled together by two different cable assemblies 210a and 210b. One of the cable assemblies 210a is used for transferring digital pixel data to display 203, and the other cable assembly is used for serially communicating digital data back and forth between the processor unit 202 and the hub system 201. Digital pixel data intended to be displayed is received over the first cable assembly 210a, retained, and properly processed for display by the display 203. However, the serial digital data intended for any of the other peripherals is received over the second cable assembly 210b, passed through the hub system 201, and routed to the proper peripheral. Accordingly, each of the other peripherals sends information to the processor unit 202 or receives information from the processor unit 202 through the hub system 201 over cable assembly 210b; while the display 203 receives digital pixel data over cable assembly 210a. 
In one prior art embodiment, the cable assembly 210a will include four twisted wire differential pairs. This configuration is common in a computer system which uses TMDS communications for the transfer of digital pixel data from the processor unit 202 to the display 203. In a TMDS system, a single twisted wire differential pair is used for each of the primary red, green and blue pixel data streams and a fourth twisted wire differential pair for transmitting a clock signal. Alternatively, the cable assembly 210a may include more than four twisted wire differential pairs depending upon the type of communications protocol used for transferring the digital pixel data. For example, a system which uses an LVDS communications protocol would require five twisted wire pairs for transferring the digital pixel data to the display 203.
FIG. 3 illustrates a prior art system for communicating digital pixel data over a first cable assembly 210a in a first direction from processing unit 202 to display 203; and, for communicating digital data over a second cable assembly 210b in a second direction from any of the peripherals coupled to the hub system of display 203 to processing unit 202. As shown, a transmitter 301 is implemented within the processor 202 for transmitting digital pixel data from the processor 202 to the display 203. A receiver 302 is implemented within the display 203 having a hub system for receiving digital pixel data for display from the processor 202. As indicated earlier, in a system which utilizes a TMDS communications protocol for transferring digital pixel data to display 203, cable assembly 210a is actually comprised of four twisted wire pairs, with a first twisted wire pair 305a used for transmitting red pixel data from the processor 202 to display 203, a second twisted wire pair 305b used for transmitting green pixel data from the processor 202 to display 203, and a third twisted pair 305c used for transferring blue pixel data from the processor 202 to display 203. The fourth twisted wire pair 305d is used for routing a clock signal from the processor 202 to the display 203 for synchronizing the digital pixel data at the receiver 302. Alternatively, the system may use any other appropriate communications protocol for transferring digital pixel data to the display 203, in which case the number of twisted wire differential pairs (or single wires) coupled between the processing unit 202 and the display 203 may vary.
Referring again to FIG. 2, cable assembly 210b will also include multiple wires for transmitting digital data to the processor 202 from each of the peripherals coupled to the hub system of display 203. These wires may use any one of various communications such as Universal Serial bus. The number of wires used in cable assembly 210b is dependent upon the particular system configuration. For example, it is desirable to be able to transmit digital data from the digital camera to the processor, while also transmitting data from the mouse or keyboard and accordingly multiple wires are required. Accordingly, as shown in FIG. 3, the processor unit 202 further includes a receiver 310, while the display 203 with hub system includes a transmitter 315. The transmitter 315 of the display 203 with hub system routes digital information incoming from the other peripherals coupled to the display 203 to the receiver in the processor 202. The prior art embodiment in FIG. 3 shows three twisted wire differential pairs 306a-c which may be used for communicating digital data from the peripherals coupled to the hub system of display 203 to the processing unit 202. It is understood, that in the prior art, any number of twisted wire pairs may be used for transferring such data. In the prior art embodiment illustrated in FIG. 3, the transmitter 315 generates its own clock reference signal on line 306c. 
While the computer system illustrated in FIG. 2 may reduce the overall number of cable assemblies coupled directly to the processor 202, it is still undesirable because it requires a large number of wires. Accordingly, what is needed is a simpler system for linking the processor unit with the hub system without requiring multiple cabling assemblies which also reduces the number of wires coupled to the processor, thereby reducing costs and improving the performance of the system.
A method for communicating between a processor and a video display monitor is disclosed. In one embodiment, the method includes transmitting digital pixel data from the processor to the video display monitor in a forward direction over two differential wire pairs, and transmitting auxiliary digital data from the processor to the video display monitor in a forward direction over the two differential wire pairs by manipulating the DC offsets in the two differential wire pairs thereby using the two differential wire pairs as a single differential pair.